Connect AI models with reusable hardware implementations.
FPGAI is the open compiler layer underneath Morfics. It maps inference and training workloads to FPGA systems and will import implementation packages published by the community across AMD/Xilinx, Intel, Lattice, open-source, and custom flows.
Import
Start from ONNX, an FPGAI project, or a community implementation package.
Analyze
Inspect operators, tensor movement, precision, memory, interfaces, and target compatibility.
Select implementations
Use built-in kernels or reusable HLS, VHDL, Verilog, and SystemVerilog packages.
Build and validate
Generate target-specific projects, reports, testbenches, runtime artifacts, and deployment bundles.
The community can add more than models.
FPGAI registries are planned for operators, complete models, backends, boards, memory policies, transport, optimizers, losses, datasets, reports, and runtime adapters.
Scientific IR
Explicit tensor, memory, transport, precision, inference, and training semantics.
Plugin architecture
Contributors add packages through stable manifests and registries instead of editing central compiler files.
Hardware path
Target user-owned boards, managed accelerator infrastructure, and private or embedded deployments.
See how community assets can become compiler-ready implementations.
The flow explains native packages, metadata-compatible assets, adapter requirements, and future deployment targets.
FPGAI Compiler
One path from source to hardware
Pick an input format to trace its current compatibility path.
Community package
Your source, published as a package.
Morfics metadata
Normalized description of the source.
FPGAI registry
Matched against known implementations.
Metadata import
Metadata compatibleDeployment target
PYNQ-Z2 · KV260 · Alveo U50 / U55C
ONNX · Metadata compatible
Operators are matched against the registry; supported ops map directly, the rest are flagged.